Chips Are the Data Center: SIA-Deloitte Puts Hard Numbers on AI's Value Concentration Problem

The Single Most Important Number Is 95%

On June 1, 2026, the Semiconductor Industry Association and Deloitte published a full bill-of-materials teardown of a state-of-the-art AI server rack. Semiconductors account for over 95% of the content value of a leading AI server rack and more than 50% of the total capital expenditure required to build and operate an AI data center. This is structural economics, not an artifact of one flagship chip—it spans the entire stack, from accelerators to power management ICs and analog controllers.

Operators who treat AI infrastructure capex as a real estate and cooling problem are working from the wrong frame. The building is a delivery vehicle. The chips are the product.

What Is Actually Inside the Rack

A single AI server rack contains over 4,500 packaged chips, comprised of approximately 20,000 individual dies — unique integrated circuits. The chip categories span advanced logic devices such as AI accelerators, ASICs, FPGAs, CPUs, DPUs, and networking processors; memory technologies including HBM, DRAM, SRAM, and NAND flash storage; and analog and foundational semiconductors such as power management ICs, transceivers, controllers, and sensors.

The stability of the entire AI data server rests on a long tail of lower-cost foundational chips — including compound semiconductors made from more than one material — that account for roughly 10% of chip content by value but the majority of chips in a server by volume. This asymmetry has real consequences for procurement. The components least discussed in vendor negotiations are the ones most likely to cause line stoppages when supply tightens.

Power density is accelerating in parallel. Current high-performance AI racks require approximately 100–120 kW of power, but future architectures are expected to support racks consuming up to 1 MW. To improve efficiency, data centers are increasingly adopting advanced power technologies such as gallium nitride (GaN) and silicon carbide (SiC) semiconductors. The rack's energy problem is itself a semiconductor problem.

The Market Size Forces the Strategy Conversation

Researchers estimate that annual semiconductor revenue generated from AI data center deployments could exceed $1.2 trillion by 2028 — almost a tenfold increase compared with levels seen just four years earlier. If realized, annual AI-related semiconductor revenue would surpass total global semiconductor sales recorded across all markets in 2025 by more than 50%.

Global investments in AI data center infrastructure are expected to exceed $4 trillion by 2028, with semiconductor spending alone reaching as much as $2.8 trillion. At that scale, the semiconductor TAM attracts new entrants. But the market is concentrated enough that incumbents with proven yield, logistics, and packaging capability—TSMC at the foundry level, NVIDIA and Broadcom at the design level—will defend structural margins as long as supply remains constrained.

The AI data center market is projected to grow at a compound annual growth rate of 88.8% between 2022 and 2028. That growth rate is aggressive enough that no operator should assume a stable supply picture for any chip category inside that rack.

Who This Hurts and Who It Helps

The 95% figure is a gift to chip suppliers and a problem for everyone else in the stack. Systems integrators and rack designers now have quantified proof that their portion of rack value is below 5%. Their differentiation narrative—thermal management, form factor optimization, integration services—survives only if chip suppliers allow it. As chip suppliers push proprietary form factors and cooling specifications tied to specific silicon, that window narrows.

For enterprise buyers, the concentration creates a specific lock-in risk that is now harder to ignore at the board level. If chip suppliers control form factor, interconnect standards, and cooling requirements, switching costs compound with every generation. The rack becomes less a piece of hardware-agnostic infrastructure and more a chip supplier's deployment specification with steel around it.

For cloud operators, the data justifies the custom silicon programs already underway. Custom AI chips are outpacing Nvidia GPU shipment growth in 2026 for the first time, with TrendForce projecting 44.6% ASIC growth against 16.1% for merchant GPUs. Custom ASICs from Google (TPU v7 Ironwood), Microsoft (Maia 200), Amazon (Trainium 3), and Meta (MTIA) are growing at 44.6% CAGR, targeting the inference workloads that now represent two-thirds of all AI compute. The incentive is direct: margin recapture. If chips are 95% of rack value and you are a hyperscaler running millions of racks, even a 10-point shift toward in-house silicon carries a nine-figure annual impact.

Yet Broadcom and Marvell together control an estimated 95% of the custom AI ASIC co-design market, serving as the engineering partners that translate hyperscaler chip specifications into manufacturable silicon. The irony is sharp: the escape from one chip supplier's leverage often runs directly through two others.

The Feedback Loop Problem

The rapid expansion of AI is creating a powerful feedback loop, where advances in semiconductors enable more capable AI systems, while growing AI adoption drives demand for increasingly advanced chips across logic, memory, networking, power management, and storage technologies. Each new model generation requires more chips per rack, more rack density per data center, and more specialized silicon per workload. Operators planning capex on current rack specifications are planning for a moving target.

If chip supply normalizes in 2027–2028—either through capacity expansion at TSMC and Samsung or through broader ASIC adoption reducing merchant GPU demand—the 95% concentration figure will shift from a supplier advantage to an operator leverage point. Buyers with diversified chip relationships and chip-agnostic rack designs will be positioned to extract concessions. Those locked into single-supplier architectures will face constrained options.

What to Watch, In Sequence

1. Hyperscaler supply chain disclosures. Q2 and Q3 2026 earnings calls may quantify custom silicon as a percentage of internal AI compute. A disclosed percentage above 20% at any of the big four would reshape the NVIDIA pricing narrative.

2. Rack form factor standardization efforts. The Open Compute Project and similar consortia are where operators push back on proprietary chip-dictated specifications. New OCP rack standards with broad hyperscaler adoption signal coordinated pressure on supplier lock-in.

3. Foundational chip supply tightness. The 4,500-chip count means that a shortage in a low-cost analog or power management component can halt rack assembly as effectively as a GPU shortage. Lead times across the full chip stack, not just accelerators, matter.

4. Regulatory scrutiny on semiconductor supply concentration. The SIA report arrived the same week the EU advanced Chips Act 2.0. Governments now have quantified data on supply concentration risk. Antitrust and supply security inquiries targeting the 95% figure are a plausible second-order effect.

5. The $2.8 trillion figure as a procurement benchmark. Any operator building a multi-year AI infrastructure plan who cannot account for their share of that spending has a gap in their vendor strategy. The number is now public and boardroom-legible.